Embodiments of the present invention relate to equalization circuitry.
In some equalization circuitry, a digital-to-analog converter is used to control the amount of equalization. One type of digital-to-analog converter used in this context is an R-2R digital-to-analog converter. There are a number of disadvantages to using an R-2R digital-to-analog converter to control the amount of equalization in an equalization circuitry.
The R-2R digital-to-analog converter in such an equalization circuitry functions across two voltage domains, an upper voltage domain and a lower voltage domain, where the upper voltage domain has a voltage that is twice as large as that of the lower voltage domain. The output of the R-2R digital-to-analog converter feeding into the equalizer control knob circuits is in the lower voltage domain, whereas the digital binary high voltage input to the R-2R digital-to-analog converter and the supply voltage to the operational amplifier of the R-2R digital-to-analog converter are in the upper voltage domain. The control circuitry that feeds into the R-2R digital-to-analog converter and may use the same voltage supply as the equalizer (in this case, the lower voltage domain) communicates with the R-2R digital-to-analog converter across the two voltage domains. As a result, a voltage level shifter is used to convert voltages from one voltage domain to the other. The use of the voltage level shifter increases the overall device layout area. Similarly, the operational amplifier of the R-2R digital-to-analog converter also increases the overall device layout area.
Furthermore, the operational amplifier with its high power supply voltage consumes a large amount of power. Thus, the use of an R-2R digital-to-analog converter in an equalization circuitry results in both a larger device layout area and higher power consumption.
The higher power consumption and larger device layout area are further compounded by the fact that each single-stage equalizer control knob circuit has a separate R-2R digital-to-analog converter associated therewith. As used herein, a single-stage equalizer control knob circuit refers to an equalizer control knob circuit that directly controls the equalization of only a single stage of a multi-stage equalizer. This is in contrast to a multi-stage equalizer control knob circuit which directly controls the equalization of multiple stages of a multi-stage equalizer. In some cases, there are four single-stage equalizer control knob circuits, a separate one for each of the four stages of the equalizer. In such a case, there are four separate R-2R digital-to-analog converters, one for each of the four single-stage equalizer control knob circuits.
Moreover, in the R-2R digital-to-analog converter, the resistor ratio that determines the analog output voltage varies with temperature, process, and uncertainties in resistor ratios/values (e.g., poly resistor ratios/values). The variation in the resistor ratio distorts the analog output voltage and causes it to differ from its target value. This destroys the linearity between the output analog voltage and the digital binary value input to the R-2R digital-to-analog converter. As a result, in the R-2R digital-to-analog converter, there is a tradeoff between linearity and tuneability of the output analog voltage versus the digital binary input value.
Embodiments of the equalization circuitry of the present invention arise in this context.